Memory Segmentation

Memory Segmentation

Historical Context

Memory segmentation was introduced to work around limits of processors like 8086/80286, which had 16-bit registers but 20-bit address bus, so:

• 16-bit registers could only address 64KB (2^16 bytes)
• 20-bit address space was needed to be send from CPU
• Solution: the Segment:Offset addressing model

Segment:Offset Model

Physical Address = (Segment × 16) + Offset

Memory is divided into segments:

• CS (Code Segment) - executable code (IP offset)
• DS (Data Segment) - data storage (SI offset)
• SS (Stack Segment) - stack operations (SP/BP offset)
• ES/FS/GS (Extra Segments) - additional data (DI offset)

Example addressing:

Segment = 0x1000
Offset  = 0x0500
Physical = (0x1000 × 16) + 0x0500 = 0x10500

Why It's No Longer a Concern

Modern processors use a flat memory model:

• 32-bit systems: 4GB address space with a single segment
• 64-bit systems: 16 exabytes theoretical address space
• Segments still exist but cover the entire address space (base = 0, limit = max)
• Only used for thread-local storage (FS/GS registers) and privilege separation

Protection is now handled by paging and virtual memory, not segmentation.

References

• Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System Programming Guide, Part 1, Chapter 3 (Protected-Mode Memory Management)